How are Microchips Made? 🖥️🛠️ CPU Manufacturing Process Steps

Also, if you have any questions on the video or semiconductor fabrication, I'd be happy to answer them here.
This video took an incredible amount of work to make. Me (Teddy T.) and a few other animators (Mike R., Prakash K., Adrei D., and Parvesh K.) have been working non-stop on this video for the past 4.5 months. If you want more videos like this one support our Patreon: https://www.patreon.com/brancheducation

Q: Why do we use older components e.g. i9-13900K, or the 3090GPU, or Iphone 13 Pro. A: We purchase broken (typically 1 generation old) components from EBay and tear them open to model them.

Q: Is binning done with all the chips?
A: Well GPUs are also binned, for example the 3090ti, 3080ti, 3090 and 3080 are all the same chip design called GA102. Whereas DRAM chips are not typically binned, but rather due to the redundancy of DRAM, there are typically extra array structures beyond the capacity of the chip. If cells in an array fail, then they are replaced with the redundant cells. When a chip runs out of redundancy it's considered defective and thrown out. Beyond that chips are binned based on quality and interface speed capability. Thank you @JoeLion55 for the correction.

Q: Marcel151 asked: The transistor layer, sits it more at the bottom or at the top of the CPU?

A: JoeLion55 answered: During construction on the wafer, the transistors are built first, directly on the surface of the silicon wafer. Then all of the metal interconnect layers are built on top. This all happens on the original wafer, with hundreds of dies on the wafer. So when in wafer form, the transistors are on the bottom, and the metal is on the top. However, during the packaging process, after the dies are cut apart from the wafer, the die is flipped over and mounted upside-down onto the package substrate. This is because the pins are on the bottom of the package (the pins that go into the socket on the motherboard). The pins on the package need to connect to the top metal layer on the die, which is what allows external signals to enter and exit the die. So, the die is flipped over so the top metal layer is now facing down, and is soldered to the package substrate. So technically, when you have a final "chip" that you install in a motherboard, when you're looking at the top of the chip where the heatspreader is, if you had X-ray vision and could see through the top of the chip, you would be looking at the backside of the die. The backside of the die is pure silicon. Then, if you keep looking through, you would find the transistor layers next. Then keep digging and you'd go through all of the metal layers, then finally you'd reach the interposed and package board.



Q: elektronikk-service asked: How do you align the different layers in a chip? They cannot be off by more than a few nm.
A: Joe Lion55 responds: they layers have alignment makes built in. Those are little cross or X-shaped structures that are non functional (they’re not part of any live circuit). But when the lithography machine is putting down a new layer, it will find the alignment marks from the previous layer and adjust the wafer position and/or the scanner optics until the alignment marks are in the right place.

Q: Someone asked about low die yield for small nanometer transistors, and was it just particles that resulted in low die yield?
A: For new technology nodes, which are the smallest nanometer names for the transistors- Typically low die yield is due to getting exact parameters for the process steps correct. For example, when FinFets were first being developed, a etching pillars of silicon was incredibly difficult and designing / engineering / and then fine tuning the etchers to perfectly etch billions of fins in perfect fin structures is wildly difficult and is what contributed to low die yield. This is just one of the processes but the example applies to practically all other processes for the a new node. For example, when you do ion implantation, you need to evenly implant about 5-10 atoms of boron / phos to a specific region of the fin. Well, what happens if there are just 2 dopant atoms? Or what about 50?

I am speechless. 🤐An absolutely Incredible video, through and through.

Fantastic content as always.

Watching this pre interview with KLA

Can you please add possibility of auto translate for Czech language? Thank you.

This was exactly what I was looking for.

cool

I really appreciate hardwork

As a non native english speaker I wish I could understand 100% of this video. im missing some technical words and I have a hard time processing everything. Still that was a wonderful moment and I Thank You for your work.

This very explanatory

Freakking supper amazing scifi stuff

1:10 it’s actually beautiful to think that there’s a miniature city with all these little components and there’s billions of them at the same time trying to do multiple tasks.

Incredible!

Its crazy how 120 years ago we were still using horses to get around. Planes and cars were just starting to take off. The fact that we have advanced this much over the last 120 years seems almost impossible yet its mundane to us. The level of precision needed to make CPU's is almost magic and I cant fathom how anyone or group of people could come up with the solution to make modern CPU's .

this is ammmazing

谢谢！

We want Nanoimprint lithography details video.

I watch over and over again, its nonstop joy and learn. Bravo you guys.

Thanks

Amazing video!

25:37

Unbelievable video! Amazing interesting and clear!!! Thanks!!

wow good

amazing

First, get a rock.

This is great

love you woww

Superb work